From f30ba069b707e0960eae869aa5040d3207cf5e33 Mon Sep 17 00:00:00 2001
From: Sebastien Boeuf <sebastien.boeuf@intel.com>
Date: Mon, 5 Aug 2019 17:58:55 -0700
Subject: [PATCH] vm-virtio: Allocate shared memory regions on dedicated BAR

In the context of shared memory regions, they could not be present for
most of the virtio devices. For this reason, we prefer dedicate a BAR
for the shared memory regions.

Another reason is that memory regions, if there are several, can be
allocated all at once as a contiguous region, which then can be used as
its own BAR. It would be more complicated to try to allocate the BAR 0
holding the regular information about the virtio-pci device along with
the shared memory regions.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
---
 vm-virtio/src/transport/pci_device.rs | 36 +++++++++++++++++++--------
 1 file changed, 25 insertions(+), 11 deletions(-)

diff --git a/vm-virtio/src/transport/pci_device.rs b/vm-virtio/src/transport/pci_device.rs
index a72a3d872..3de05c0ac 100755
--- a/vm-virtio/src/transport/pci_device.rs
+++ b/vm-virtio/src/transport/pci_device.rs
@@ -394,17 +394,6 @@ impl VirtioPciDevice {
             .add_capability(&configuration_cap)
             .map_err(PciDeviceError::CapabilitiesSetup)?;
 
-        let shm_cap = VirtioPciCap64::new(
-            PciCapabilityType::SharedMemoryConfig,
-            settings_bar,
-            0,
-            0u64,
-            0u64,
-        );
-        self.configuration
-            .add_capability(&shm_cap)
-            .map_err(PciDeviceError::CapabilitiesSetup)?;
-
         if self.msix_config.is_some() {
             let msix_cap = MsixCap::new(
                 settings_bar,
@@ -559,6 +548,31 @@ impl PciDevice for VirtioPciDevice {
         // Once the BARs are allocated, the capabilities can be added to the PCI configuration.
         self.add_pci_capabilities(virtio_pci_bar)?;
 
+        // Allocate a dedicated BAR if there are some shared memory regions.
+        if let Some(shm_list) = self.device.get_shm_regions() {
+            let config = PciBarConfiguration::default()
+                .set_register_index(2)
+                .set_address(shm_list.addr.raw_value())
+                .set_size(shm_list.len);
+            let virtio_pci_shm_bar =
+                self.configuration.add_pci_bar(&config).map_err(|e| {
+                    PciDeviceError::IoRegistrationFailed(shm_list.addr.raw_value(), e)
+                })? as u8;
+
+            for (idx, shm) in shm_list.region_list.iter().enumerate() {
+                let shm_cap = VirtioPciCap64::new(
+                    PciCapabilityType::SharedMemoryConfig,
+                    virtio_pci_shm_bar,
+                    idx as u8,
+                    shm.offset,
+                    shm.len,
+                );
+                self.configuration
+                    .add_capability(&shm_cap)
+                    .map_err(PciDeviceError::CapabilitiesSetup)?;
+            }
+        }
+
         Ok(ranges)
     }