hypervisor: Add a basic implementation of MshvVcpuState for aarch64

Currently we are just storing the StandardRegisters in the Vcpu state
which would be required for saving and restoring the ARM64 guest on
MSHV.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

hypervisor/src/mshv/aarch64/mod.rs

@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: Apache-2.0 OR BSD-3-Clause
+//
+// Copyright © 2025, Microsoft Corporation
+//
+use std::fmt;
+
+///
+/// Export generically-named wrappers of mshv_bindings for Unix-based platforms
+///
+pub use mshv_bindings::StandardRegisters as MshvStandardRegisters;
+use serde::{Deserialize, Serialize};
+
+#[derive(Clone, Serialize, Deserialize)]
+pub struct VcpuMshvState {
+    pub regs: MshvStandardRegisters,
+}
+
+impl fmt::Display for VcpuMshvState {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "Standard registers: {:?}", self.regs)
+    }
+}