misc: Bulk upgrade dependencies

In particular update for the vmm-sys-util upgrade and all the other
dependent packages. This requires an updated forked version of
kvm-bindings (due to updated vfio-ioctls) but allowed the removal of our
forked version of kvm-ioctls.

The changes to the API from kvm-ioctls and vmm-sys-util required some
other minor changes to the code.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford
2021-02-25 16:53:46 +00:00
parent fa8fcf5f4c
commit f8875acec2
15 changed files with 934 additions and 87 deletions

View File

@@ -15,8 +15,8 @@ epoll = ">=4.0.1"
thiserror = "1.0"
libc = "0.2.86"
log = "0.4.14"
kvm-ioctls = { git = "https://github.com/cloud-hypervisor/kvm-ioctls", branch = "ch", optional = true }
kvm-bindings = { git = "https://github.com/cloud-hypervisor/kvm-bindings", branch = "ch", features = ["with-serde", "fam-wrappers"], optional = true }
kvm-ioctls = { version = "0.7.0", optional = true }
kvm-bindings = { git = "https://github.com/cloud-hypervisor/kvm-bindings", branch = "ch-v0.3.0", features = ["with-serde", "fam-wrappers"], optional = true }
mshv-bindings = {git = "https://github.com/cloud-hypervisor/mshv", branch = "master", features = ["with-serde", "fam-wrappers"], optional = true }
mshv-ioctls = { git = "https://github.com/cloud-hypervisor/mshv", branch = "master", optional = true}
serde = {version = ">=1.0.27", features = ["rc"] }

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@@ -433,7 +433,7 @@ impl hypervisor::Hypervisor for KvmHypervisor {
{
let msr_list = self.get_msr_list()?;
let num_msrs = msr_list.as_fam_struct_ref().nmsrs as usize;
let mut msrs = MsrEntries::new(num_msrs);
let mut msrs = MsrEntries::new(num_msrs).unwrap();
let indices = msr_list.as_slice();
let msr_entries = msrs.as_mut_slice();
for (pos, index) in indices.iter().enumerate() {
@@ -1036,7 +1036,7 @@ impl cpu::Vcpu for KvmVcpu {
fn system_registers(&self, state: &mut Vec<Register>) -> cpu::Result<()> {
// Call KVM_GET_REG_LIST to get all registers available to the guest. For ArmV8 there are
// around 500 registers.
let mut reg_list = RegList::new(512);
let mut reg_list = RegList::new(500).unwrap();
self.fd
.get_reg_list(&mut reg_list)
.map_err(|e| cpu::HypervisorCpuError::GetRegList(e.into()))?;
@@ -1170,7 +1170,7 @@ impl cpu::Vcpu for KvmVcpu {
let msrs = if num_msrs != expected_num_msrs {
let mut faulty_msr_index = num_msrs;
let mut msr_entries_tmp =
MsrEntries::from_entries(&msr_entries.as_slice()[..faulty_msr_index]);
MsrEntries::from_entries(&msr_entries.as_slice()[..faulty_msr_index]).unwrap();
loop {
warn!(
@@ -1180,7 +1180,7 @@ impl cpu::Vcpu for KvmVcpu {
let start_pos = faulty_msr_index + 1;
let mut sub_msr_entries =
MsrEntries::from_entries(&msr_entries.as_slice()[start_pos..]);
MsrEntries::from_entries(&msr_entries.as_slice()[start_pos..]).unwrap();
let expected_num_msrs = sub_msr_entries.as_fam_struct_ref().nmsrs as usize;
let num_msrs = self.get_msrs(&mut sub_msr_entries)?;
@@ -1304,7 +1304,8 @@ impl cpu::Vcpu for KvmVcpu {
);
let start_pos = faulty_msr_index + 1;
let sub_msr_entries = MsrEntries::from_entries(&state.msrs.as_slice()[start_pos..]);
let sub_msr_entries =
MsrEntries::from_entries(&state.msrs.as_slice()[start_pos..]).unwrap();
let expected_num_msrs = sub_msr_entries.as_fam_struct_ref().nmsrs as usize;
let num_msrs = self.set_msrs(&sub_msr_entries)?;

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@@ -111,6 +111,7 @@ pub fn boot_msr_entries() -> MsrEntries {
),
msr_data!(msr_index::MSR_MTRRdefType, MTRR_ENABLE | MTRR_MEM_TYPE_WB),
])
.unwrap()
}
///

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@@ -93,7 +93,7 @@ impl hypervisor::Hypervisor for MshvHypervisor {
let msr_list = self.get_msr_list()?;
let num_msrs = msr_list.as_fam_struct_ref().nmsrs as usize;
let mut msrs = MsrEntries::new(num_msrs);
let mut msrs = MsrEntries::new(num_msrs).unwrap();
let indices = msr_list.as_slice();
let msr_entries = msrs.as_mut_slice();
for (pos, index) in indices.iter().enumerate() {
@@ -115,7 +115,7 @@ impl hypervisor::Hypervisor for MshvHypervisor {
/// Get the supported CpuID
///
fn get_cpuid(&self) -> hypervisor::Result<CpuId> {
Ok(CpuId::new(1))
Ok(CpuId::new(1).unwrap())
}
#[cfg(target_arch = "x86_64")]
///
@@ -759,7 +759,7 @@ impl vm::Vm for MshvVm {
let vcpu = MshvVcpu {
fd: vcpu_fd,
vp_index: id,
cpuid: CpuId::new(1),
cpuid: CpuId::new(1).unwrap(),
msrs: self.msrs.clone(),
gsi_routes: self.gsi_routes.clone(),
hv_state: self.hv_state.clone(),

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@@ -119,4 +119,5 @@ pub fn boot_msr_entries() -> MsrEntries {
msr!(msr_index::MSR_SYSCALL_MASK),
msr!(msr_index::MSR_IA32_TSC),
])
.unwrap()
}