Commit Graph

187 Commits

Author SHA1 Message Date
Muminul Islam
4e298d1abf hypervisor: maintain a bitmap for SEV-SNP VM on MSHV
Add a bitmap to MshvVM struct for caching the pages
that the VMM got shared access from the guest.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-12-12 03:32:22 +00:00
Muminul Islam
4054a49e2d hypervisor: use memory size during VM creation
For SEV-SNP VM on MSHV we need to request page access during
IO, we want to avoid such request for the page that have already
been requested. In order to maintain the bitmap we need the memory size
during bitmap creation.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-12-12 03:32:22 +00:00
Muminul Islam
e4a5219f53 hypervisor: mshv: modify GuestRequest handling for CVM
VMM needs to handle VMG exit for guest request. This patch
removes the old method that uses gpa_read/write(IOCTL and hypercall),
which is expensive and update the GHCB page using
mapped(root partition) struct.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-12-11 21:06:06 +00:00
Muminul Islam
a458351d8b hypervisor: mshv: modify MMIO exit handling for CVM
VMM needs to handle VMG exit for MMIO. This patch
removes the old method that uses gpa_read/write(IOCTL and hypercall),
which is expensive and update the GHCB page using
mapped(root partition) struct.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-12-11 21:06:06 +00:00
Muminul Islam
5a27bf878c hypervisor: mshv: modify IoPort handling for CVM
VMM needs to handle VMG exit for IO Port. This patch
removes the old method that uses gpa_read/write(IOCTL and hypercall),
which is expensive and update the GHCB page using
mapped(root partition) struct.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-12-11 21:06:06 +00:00
Muminul Islam
310dafb4d7 hypervisor: mshv: modify doorbell page handling for CVM
VMM needs to handle VMG exit for doorbell page. This patch
removes the old method that uses gpa_read/write(IOCTL and hypercall),
which is expensive and update the GHCB page using
mapped(root partition) struct.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-12-11 21:06:06 +00:00
Muminul Islam
78895dcc37 hypervisor: mshv: clear exitinfo1 using mapped ghcb address
After handling the VMG exit vmm needs to clear the exitinfo1
into the GHCB page. This patch replaces the old
method(gpa_write) and clear the exitinfo1 using mapped GHCB struct.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-12-11 21:06:06 +00:00
Muminul Islam
1757d83db3 hypervisor: Keep GHCB mapped address for each VCPU on MSHV
For confidential VM on MSHV, GHCB page is the communication
method between guest and host. All the CVM exits, VMM
needs to read and write to the GHCB page. MSHV provides
an option to remap the page to the root partition. This
way VMM could directly read and write to the page and
skip extra IOCTL and hypercall. This improvement makes
the IO 10% faster.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-12-11 21:06:06 +00:00
Rob Bradford
166a005b76 hypervisor: mshv: Fix superflous lifetimes
warning: the following explicit lifetimes could be elided: 'a
   --> hypervisor/src/arch/x86/emulator/mod.rs:492:6
    |
492 | impl<'a, T: CpuStateManager> Emulator<'a, T> {
    |      ^^                               ^^
    |
    = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#needless_lifetimes
    = note: `#[warn(clippy::needless_lifetimes)]` on by default
help: elide the lifetimes
    |
492 - impl<'a, T: CpuStateManager> Emulator<'a, T> {
492 + impl<T: CpuStateManager> Emulator<'_, T> {
    |

warning: the following explicit lifetimes could be elided: 'a
  --> hypervisor/src/mshv/x86_64/emulator.rs:19:6
   |
19 | impl<'a> MshvEmulatorContext<'a> {
   |      ^^                      ^^
   |
   = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#needless_lifetimes
help: elide the lifetimes
   |
19 - impl<'a> MshvEmulatorContext<'a> {
19 + impl MshvEmulatorContext<'_> {
   |

warning: the following explicit lifetimes could be elided: 'a
  --> hypervisor/src/mshv/x86_64/emulator.rs:65:6
   |
65 | impl<'a> PlatformEmulator for MshvEmulatorContext<'a> {
   |      ^^                                           ^^
   |
   = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#needless_lifetimes
help: elide the lifetimes
   |
65 - impl<'a> PlatformEmulator for MshvEmulatorContext<'a> {
65 + impl PlatformEmulator for MshvEmulatorContext<'_> {
   |

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
2024-10-21 15:28:17 +00:00
Ruoqing He
61e57e1cb1 misc: Further improve imports styling
By introducing `imports_granularity="Module"` format strategy,
effectively groups imports from the same module into one line or block,
improving maintainability and readability.

Signed-off-by: Ruoqing He <heruoqing@iscas.ac.cn>
2024-09-29 16:13:48 +00:00
Rob Bradford
88a9f79944 misc: Adapt consistent import style formatting
Historically the Cloud Hypervisor coding style has been to ensure that
all imports are ordered and placed in a single group. Unfortunately
cargo fmt has no support for ensuring that all imports are in a single
group so if whitespace lines were added as part of the import statements
then they would only be odered correctly in the group.

By adopting "group_imports="StdExternalCrate" we can enforce a style
where imports are placed in at most three groups for std, external
crates and the crate itself. Choosing a style enforceable by the tooling
reduces the reviewer burden.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
2024-09-29 13:08:12 +01:00
Nuno Das Neves
9f08aa6dc2 hypervisor: mshv: Update mshv crates to v0.3.0
And modify to code to use the updated interfaces.

Arguments for map_guest_memory, get_dirty_bitmap, vp.run(),
import_isolated_pages, modify_gpa_host_access have changed.
Update these to use the new interfaces, including new MSHV_*
definitions, and remove some redundant arguments.

Update seccomp IOCTLs to reflect interface changes.

Fix irq-related definitions naming.

Bump vfio-ioctls to support mshv v0.3.0.

Signed-off-by: Nuno Das Neves <nudasnev@microsoft.com>
2024-09-25 16:23:45 +00:00
Tom Dohrmann
8fd0310db9 hypervisor: mshv: implement extended guest requests with empty certs
Previously we didn't handle extended guest requests at all and always
returned an error. This lead to issues with some guests that expected
extended requests to succeed. Instead, handle extended requests like
normal requests and write zeros to the extended area to signal to the
guest that we don't want to supply any additional certificate data.

Signed-off-by: Tom Dohrmann <erbse.13@gmx.de>
2024-08-30 18:36:54 +00:00
Tom Dohrmann
486c61da5e hypervisor: mshv: add helpers for reading and writing guest memory
Signed-off-by: Tom Dohrmann <erbse.13@gmx.de>
2024-08-30 18:36:54 +00:00
Anirudh Rayabharam
f63c2d896f hypervisor: mshv: implement get_guest_debug_hw_bps
Implement get_guest_debug_hw_bps() for mshv and simply return 0 for now.
This unblocks the usage of the crashdump feature with mshv. If left
unimplemented, Cloud Hypervisor built with mshv and guest_debug features
crashes immediately upon start due to unimplemented!() macro.

Signed-off-by: Anirudh Rayabharam <anrayabh@microsoft.com>
2024-08-27 16:11:52 +00:00
Tom Dohrmann
ca88d4449e hypervisor: mshv: Fix panic when rejecting extended guest report
swei2_rw_gpa_arg.data is an array of size 16 and value.to_le_bytes() is
only 8 bytes.

Co-authored-by: Paul Meyer <49727155+katexochen@users.noreply.github.com>
Signed-off-by: Tom Dohrmann <erbse.13@gmx.de>
2024-08-22 18:13:50 +00:00
Jinank Jain
4c99aea6c4 hypervisor: Switch to use the new StandardRegisters
With this we are removing the CloudHypervisor definition of
StandardRegisters instead using an enum which contains different
variants of StandardRegisters coming from their bindigs crate.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-08-19 21:41:22 +00:00
Jinank Jain
feb0a36067 hypervisor: Implement StandardRegisters as union of KVM & MSHV
Currently we are redefining StandardRegisters instead of using the ones
coming from bindings. With this we can remove the unnecessary
construction of global structure which contains fields from different
hypervisor dependent structs.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-08-19 21:41:22 +00:00
Jinank Jain
3645654c39 hypervisor: Add an API to create default StandardRegisters
This will be used to create StandardRegisters for a given vcpu in
future.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-08-19 21:41:22 +00:00
Nuno Das Neves
00b4d97826 vmm: Replace hardcoded mshv IOCTL numbers in seccomp
Use the IOCTL numbers directly from mshv-ioctls instead of hardcoding
them in the seccomp filters.

Remove seccomp rules for unused ioctls:
MSHV_GET_VERSION_INFO,
MSHV_ASSERT_INTERRUPT.

Signed-off-by: Nuno Das Neves <nudasnev@microsoft.com>
2024-08-13 18:52:46 +00:00
Jinank Jain
3fe7d6d904 hypervisor: mshv: Disable previous GHCB page before setting new one
CVM guests can configure GHCB page multiple times during it's
lifetime depending on it's requirement. For example a Linux CVM guest
configures a different GHCB page during compressed kernel boot and sets
up a new one after decompressing the kernel. As a cleanup step, VMM
should unset the previous GHCB page before registering a new one for
a particular vcpu thread.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-08-13 16:59:31 +00:00
Muminul Islam
5c4b5c0e40 hypervisor: mshv: add definition to get access pages
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-08-09 17:40:13 +00:00
Jinank Jain
330e1aac36 hypervisor: mshv: Clear SW_EXIT_INFO1 in case of no error
There were some scenarios where we are not clearing SW_EXIT_INFO1 to
indicate that there were no error while handling the GHCB exit.
Recently, new Linux guests got stricter with checking the value of
SW_EXIT_INFO1 after coming back from VMGEXIT and started crashing. Fix
this behavior by clearing out SW_EXIT_INFO1 in case of no error.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-07-24 01:31:10 +00:00
Jinank Jain
b73d94f969 hypervisor: mshv: Refactor x86 emulator into different module
This is a preparatory work to make space for ARM64 emulator.
There is no functional change in this commit, just moving code from one
file to another.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-07-15 23:05:11 +00:00
Jinank Jain
ead4f767ff hypervisor: mshv: Restrict dependency to x86
iced_x86 is only available on x86 architecture.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-07-15 23:05:11 +00:00
Wei Liu
18340d9761 hypervisor: mshv: fine-grained control over translation flags
The assertion that only code emulation requires GVA to GPA translation
is wrong.

Allow the caller of `translate` to pass in permission flags directly.

Provide a new method `read_memory_flags` so that we can add the EXECUTE
permission flag where necessary.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2024-07-12 16:12:33 +00:00
Wei Liu
cfaa192eb4 hypervisor: emulator: drop the unused gva_to_gpa hook
That function is too limiting. It doesn't consider page permissions. It
is not used, so just drop it.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2024-07-12 16:12:33 +00:00
Wei Liu
14b45e4d2e hypervisor: mshv: handle GPA intercept
We will start receiving GPA intercepts. For our use cases they are
handled the same way as UNMAPPED GPA intercepts.

Put in some logging to distinguish the two cases.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2024-07-04 18:45:01 +00:00
Wei Liu
519476e842 hypervisor: mshv: relax the requirement for instruction emulation
Previously we required the hypervisor to give us a valid instruction
stream. That worked well enough because we never hit any edge conditions
(such as when the instruction stream crosses page boundary).

Now that MSHV can deal with partial or empty instruction stream, we can
remove that requirement.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2024-07-04 18:45:01 +00:00
Wei Liu
5fec858130 hypervisor: mshv: implement fetching instructions in emulator
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2024-07-04 18:45:01 +00:00
Wei Liu
67f22b6aa4 hypervisor: mshv: fix GVA translation flags
Original we checked for R and W, but that code path never got executed.

It is now understood that we can only get here when we execute code. Fix
the permission flags.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2024-07-04 18:45:01 +00:00
Josh Soref
42e9632c53 misc: Fix spelling issues
Misspellings were identified by:
  https://github.com/marketplace/actions/check-spelling

* Initial corrections based on forbidden patterns from the action
* Additional corrections by Google Chrome auto-suggest
* Some manual corrections
* Adding markdown bullets to readme credits section

Signed-off-by: Josh Soref <2119212+jsoref@users.noreply.github.com>
2024-06-08 16:31:30 +00:00
Muminul Islam
06e8d1c40c hypervisor: mshv: fix topology for Intel HW on MSHV
Populating these cpuid with default values so that
CLH can patch with topology information. Otherwise it gets
skipped while setting some topology information.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-06-04 04:57:34 +00:00
Jinank Jain
6c90623c8e hypervisor: mshv: Only perform SNP operation for x86 partition
SEV-SNP partitions are only supported on x86 architecture.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-05-23 15:18:00 +00:00
Jinank Jain
94fe22da62 hypervisor: mshv: Only set unimplemented MSR for x86 partition
This partition property is only supported for x86 partition. Thus,
reduce the scope of it.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-05-23 15:18:00 +00:00
Jinank Jain
af1f94e5b8 hypervisor: mshv: Reduce the scope of VMEXITs to x86_64
Certain VMEXITs can only happen for x86 guests, thus reduce the scope to
x86_64 at the compilation stage.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-05-21 16:16:29 +00:00
Muminul Islam
a5a41bf797 hypervisor: always create a frozen partition
Create a partition frozen always, then unfreeze the partition
during boot phase or resume phase. We also freeze the
partition during pause event. Time is freeze during the
time between freeze and unfreeze.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-05-16 14:17:07 +00:00
Muminul Islam
aabfc9513e hypervisor: implement pause/resume API for MSHV
Implementing pause/Resume API for MSHV.
Here we set/reset the partition property(TIME_FREEZE)

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-05-16 14:17:07 +00:00
Muminul Islam
4847f5c4f6 hypervisor: implement clock data for MSHV
This PR implement time reference for Microsoft
Hypervisor based partition/VM.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-04-29 16:46:26 +00:00
Rob Bradford
b89657ea22 hypervisor, vmm: Don't re-export the contents of mshv_bindings::*
The contents of this crate may change and cause conflicts - re-exporting
the contents is unnecessary.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
2024-04-25 20:53:53 +00:00
Muminul Islam
512591ba1c hypervisor: rework VP state components
On Microsoft Hypervisor, we need to save/restore five
VP state components which are as follows:
    1. Local APIC
    2. Xsave
    3. Synthetic Message Page
    4. Synthetic Event Flags Page
    5. Synthetic Timers

In the MSHV crate we created a single struct for all the
components and API to get/set the states.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2024-04-24 16:02:54 +00:00
Nuno Das Neves
28d4957ba5 hypervisor: Remove redefinition of HV_PAGE_SIZE in mshv
HV_PAGE_SIZE is defined as a usize in mshv_bindings.
Remove the redefinition, and perform casts where necessary.

Signed-off-by: Nuno Das Neves <nudasnev@microsoft.com>
2024-03-29 13:14:37 -07:00
Jinank Jain
f0be099461 hypervisor: mshv: Add missing prototype of struct Vcpu for MshvVcpu
These are required while compiling for target aarch64.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-03-26 16:18:06 +00:00
Jinank Jain
3f95ada71e hypervisor: mshv: Add missing prototype of struct Vm for MshvVm
These functions are required when compiling for aarch64.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-03-26 16:18:06 +00:00
Jinank Jain
58e6a289ab hypervisor: mshv: Restrict MshvEmulator to x86
Current MSHV emulator only works for x86 instruction decoder. So, let's
restrict its usage to x86.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-03-23 17:20:18 +00:00
Jinank Jain
7c6c45128d hypervisor: mshv: Move ClockData under x86 feature flag
ClockData enum is only defined for x86_64 architecture so let's use it
just for that.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-03-23 17:20:18 +00:00
Jinank Jain
f7b9a6e577 hypervisor: mshv: Restrict unmapped GPA exit to x86
Current instruction emulator can only decode x86 instructions. Thus,
restrict the exit handling for just x86 guests.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-03-21 08:34:20 +00:00
Jinank Jain
c9e989de6e hypervisor: mshv: Restrict IO port exit to x86
IO ports exits can only happen on a x86 guest.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-03-21 08:34:20 +00:00
Jinank Jain
2501426e47 hypervisor: mshv: Restrict APIC EOI message to x86
APIC controller is only available on x86 machine. ARM uses a different
interrupt controller so those exit messages won't happen for ARM guests.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-03-21 08:34:20 +00:00
Jinank Jain
dad1ab1227 hypervisor: mshv: Restrict NMI injection to x86
NMI injection is only supported on x86 architecture.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-03-21 08:34:20 +00:00