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390 Commits

Author SHA1 Message Date
dependabot[bot]
b440cb7d23 build: bump vmm-sys-util from 0.9.0 to 0.10.0 
This patch requires the vhost-user-backend crate to be bumped from 0.5.0
to 0.5.1.

Bumps [vmm-sys-util](https://github.com/rust-vmm/vmm-sys-util) from 0.9.0 to 0.10.0.
- [Release notes](https://github.com/rust-vmm/vmm-sys-util/releases)
- [Changelog](https://github.com/rust-vmm/vmm-sys-util/blob/main/CHANGELOG.md)
- [Commits](https://github.com/rust-vmm/vmm-sys-util/compare/v0.9.0...v0.10.0)

---
updated-dependencies:
- dependency-name: vmm-sys-util
  dependency-type: direct:production
  update-type: version-update:semver-minor
...

Signed-off-by: dependabot[bot] <support@github.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
 2022-07-20 09:40:28 +00:00
Wei Liu
f21fc1dcb6 hypervisor: x86: provide a generic MsrEntry structure 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-20 10:13:41 +01:00
Wei Liu
4d2cc3778f hypervisor: move away from MsrEntries type 
It is a flexible array. Switch to vector and slice instead.

No functional change intended.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-20 10:13:41 +01:00
Wei Liu
563919fc4a hypervisor: x86: drop get_msr_list from hypervisor trait 
It is not needed by code outside of the hypervisor crate.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-19 09:38:38 +01:00
Wei Liu
05e5106b9b hypervisor x86: provide a generic LapicState structure 
This requires making get/set_lapic_reg part of the type.

For the moment we cannot provide a default variant for the new type,
because picking one will be wrong for the other hypervisor, so I just
drop the test cases that requires LapicState::default().

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-19 09:38:38 +01:00
Wei Liu
d461daa7fa hypervisor: x86: drop get/set VcpuEvents from vcpu trait 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-19 09:38:38 +01:00
Wei Liu
58dbf07453 hypervisor: x86: drop get/set Xcrs from Vcpu trait 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-19 09:38:38 +01:00
Wei Liu
c8d9a43072 hypervisor: x86: drop get/set Xsave from Vcpu trait 
They are only needed internally within the hypervisor crate.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-19 09:38:38 +01:00
Wei Liu
6a8c0fc887 hypervisor: provide a generic FpuState structure 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-18 22:15:30 +01:00
Wei Liu
08135fa085 hypervisor: provide a generic CpudIdEntry structure 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-18 22:15:30 +01:00
Wei Liu
45fbf840db hypervisor, vmm: move away from CpuId type 
CpuId is an alias type for the flexible array structure type over
CpuIdEntry. The type itself and the type of the element in the array
portion are tied to the underlying hypervisor.

Switch to using CpuIdEntry slice or vector directly. The construction of
CpuId type is left to hypervisors.

This allows us to decouple CpuIdEntry from hypervisors more easily.

No functional change intended.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-18 22:15:30 +01:00
Wei Liu
edf6dda705 hypervisor: mshv: drop get_suspend_regs 
It is not used (yet).

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-18 11:02:51 +01:00
Wei Liu
f1ab86fecb hypervisor: x86: provide a generic SpecialRegisters structure 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-15 10:21:43 +01:00
Wei Liu
d2b194c4f1 hypervisor: x86: provide a generic DescriptorTable structure 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-15 10:21:43 +01:00
Wei Liu
75797827d5 hypervisor: x86: provide a generic SegmentRegister structure 
And drop SegmentRegisterOps since it is no longer required.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-15 10:21:43 +01:00
Wei Liu
8b7781e267 hypervisor: x86: provide a generic StandardRegisters structure 
We only need to do this for x86 since MSHV does not have aarch64 support
yet. This reduces unnecessary code churn.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-15 10:21:43 +01:00
Wei Liu
d20f647b32 hypervisor: provide a generic IrqRoutingEntry structure 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-15 10:21:43 +01:00
Wei Liu
4201bf4011 hypervisor: provide a generic ClockData structure 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 22:09:04 +01:00
Wei Liu
beb4f86b82 hypervisor, vmm: drop VmState and code 
VmState was introduced to hold hypervisor specific VM state. KVM does
not need it and MSHV does not really use it yet.

Just drop the code. It can be easily revived once there is a need.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 22:09:04 +01:00
Wei Liu
72d552e5e1 hypervisor: provide a generic CpuState structure 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 22:09:04 +01:00
Wei Liu
dd592e86fd hypervisor: do not export VcpuEvents 
It is not used anywhere outside of the hypervisor crate.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 22:09:04 +01:00
Wei Liu
f9f0a60dcf hypervisor: provide a generic IoEventAddress structure 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 22:09:04 +01:00
Wei Liu
9810ed4496 hypervisor: provide a generic MpState structure 
It is however only used for KVM right now because MSHV does not need it
yet.

Nonetheless a stub MSHV constructor should be there and get/set
functions should be implemented for MSHV.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 22:09:04 +01:00
Wei Liu
02866fccb0 hypervisor: drop unused IrqRouting struct from MSHV 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 22:09:04 +01:00
Wei Liu
4a1eab11b4 hypervisor: do not export VcpuExit 
It is not used anywhere outside of the hypervisor crate.

Signed-off-by: Dev Rajput <t-devrajput@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 16:37:47 +01:00
Michael Zhao
f0ad7fc74f hypervisor: Remove arch_target = "arm"' in cfg` 
Some `arch_target = "arm"' usages on VCPU related code are not correct.
And we don't support 32-bit ARM architecture.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
 2022-07-14 22:55:19 +08:00
Michael Zhao
2d8635f04a hypervisor: Refactor system_registers on AArch64 
Function `system_registers` took mutable vector reference and modified
the vector content. Now change the definition to `get/set` style.
And rename to `get/set_sys_regs` to align with other functions.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
 2022-07-14 22:55:19 +08:00
Michael Zhao
c445513976 hypervisor: Refactor core_registers on AArch64 
On AArch64, the function `core_registers` and `set_core_registers` are
the same thing of `get/set_regs` on x86_64. Now the names are aligned.
This will benefit supporting `gdb`.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
 2022-07-14 22:55:19 +08:00
Wei Liu
47b5581c50 hypervisor: drop a level of indirection for MSHV's DeviceFd 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 08:09:50 +01:00
Wei Liu
3710932248 hypervisor: drop a level of indirection for KVM's DeviceFd 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 08:09:50 +01:00
Wei Liu
ddad5f3510 hypervisor: allow downcasting to KVM / MSHV device fd 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 08:09:50 +01:00
Wei Liu
e1cf889dbd hypervisor: use UserMemoryRegion in the Vm trait 
Signed-off-by: Dev Rajput <t-devrajput@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 07:55:48 +01:00
Wei Liu
5894b5370c hypervisor: transform between UserMemoryRegion and hypervisor structs 
Signed-off-by: Dev Rajput <t-devrajput@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 07:55:48 +01:00
Wei Liu
fabc940b65 hypervisor: add UserMemoryRegion and flags 
Signed-off-by: Dev Rajput <t-devrajput@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-14 07:55:48 +01:00
dependabot[bot]
a99c33ccfa build: bump serde from 1.0.138 to 1.0.139 
Bumps [serde](https://github.com/serde-rs/serde) from 1.0.138 to 1.0.139.
- [Release notes](https://github.com/serde-rs/serde/releases)
- [Commits](https://github.com/serde-rs/serde/compare/v1.0.138...v1.0.139)

---
updated-dependencies:
- dependency-name: serde
  dependency-type: direct:production
  update-type: version-update:semver-patch
...

Signed-off-by: dependabot[bot] <support@github.com>
 2022-07-11 23:54:20 +00:00
Wei Liu
84bbaf06d1 hypervisor: turn boot_msr_entries into a trait method 
This allows dispatching to either KVM or MSHV automatically.

No functional change.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-07-08 16:49:58 +01:00
dependabot[bot]
4f611c8654 build: bump serde from 1.0.137 to 1.0.138 
Bumps [serde](https://github.com/serde-rs/serde) from 1.0.137 to 1.0.138.
- [Release notes](https://github.com/serde-rs/serde/releases)
- [Commits](https://github.com/serde-rs/serde/compare/v1.0.137...v1.0.138)

---
updated-dependencies:
- dependency-name: serde
  dependency-type: direct:production
  update-type: version-update:semver-patch
...

Signed-off-by: dependabot[bot] <support@github.com>
 2022-07-06 00:56:48 +00:00
Rob Bradford
adf5881757 build: #[allow(clippy::significant_drop_in_scrutinee) in some crates 
This check is new in the beta version of clippy and exists to avoid
potential deadlocks by highlighting when the test in an if or for loop
is something that holds a lock. In many cases we would need to make
significant refactorings to be able to pass this check so disable in the
affected crates.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
 2022-06-30 20:50:45 +01:00
Rob Bradford
2716bc3311 build: Fix beta clippy issue (derive_partial_eq_without_eq) 
warning: you are deriving `PartialEq` and can implement `Eq`
  --> vmm/src/serial_manager.rs:59:30
   |
59 | #[derive(Debug, Clone, Copy, PartialEq)]
   |                              ^^^^^^^^^ help: consider deriving `Eq` as well: `PartialEq, Eq`
   |
   = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#derive_partial_eq_without_eq

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
 2022-06-30 20:50:45 +01:00
dependabot[bot]
3d66e86604 build: bump serde_json from 1.0.81 to 1.0.82 
Bumps [serde_json](https://github.com/serde-rs/json) from 1.0.81 to 1.0.82.
- [Release notes](https://github.com/serde-rs/json/releases)
- [Commits](https://github.com/serde-rs/json/compare/v1.0.81...v1.0.82)

---
updated-dependencies:
- dependency-name: serde_json
  dependency-type: direct:production
  update-type: version-update:semver-patch
...

Signed-off-by: dependabot[bot] <support@github.com>
 2022-06-30 17:56:47 +01:00
Wei Liu
2f514523dd hypervisor: emulator: use matches! 
No functional change. Just make the code a bit nicer to read.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-06-23 17:30:21 +02:00
dependabot[bot]
eb55d0809e build: bump anyhow from 1.0.57 to 1.0.58 
Bumps [anyhow](https://github.com/dtolnay/anyhow) from 1.0.57 to 1.0.58.
- [Release notes](https://github.com/dtolnay/anyhow/releases)
- [Commits](https://github.com/dtolnay/anyhow/compare/1.0.57...1.0.58)

---
updated-dependencies:
- dependency-name: anyhow
  dependency-type: direct:production
  update-type: version-update:semver-patch
...

Signed-off-by: dependabot[bot] <support@github.com>
 2022-06-21 00:46:25 +00:00
Wei Liu
a64bdcf3f5 hypervisor: drop Send+Sync bounds for PlatformEmulator 
Signed-off-by: Wei Liu <liuwe@microsoft.com>
 2022-06-20 23:28:57 +01:00
Jinank Jain
ada85f68f6 hypervisor: mshv: Override hypervisor R/W behavior for unknown MSR 
By default Microsoft Hypervisor send a GP to the guest if it tries
read/write an unimplemented MSR from the hypervisor prospective. Instead
change this behavior to ignore read/write operations for unimplemented
MSRs

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
 2022-06-09 20:53:58 +01:00
Michael Zhao
a7a15d56dd aarch64: Move setup_regs to hypervisor 
`setup_regs` of AArch64 calls KVM sepecific code. Now move it to
`hypervisor` crate.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
 2022-06-06 11:07:46 +01:00
Michael Zhao
5d45d6d0fb vmm: Move GIC unit test to hypervisor crate 
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
 2022-06-06 10:17:26 +08:00
Michael Zhao
957d3a7443 aarch64: Simplify GIC related structs definition 
Combined the `GicDevice` struct in `arch` crate and the `Gic` struct in
`devices` crate.

After moving the KVM specific code for GIC in `arch`, a very thin wapper
layer `GicDevice` was left in `arch` crate. It is easy to combine it
with the `Gic` in `devices` crate.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
 2022-06-06 10:17:26 +08:00
Michael Zhao
b8dbb26647 hypervisor: Refactor save_pending_tables of Vgic 
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
 2022-06-06 10:17:26 +08:00
Michael Zhao
3fe7d61a02 hypervisor: Remove some redundant parameters 
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
 2022-06-06 10:17:26 +08:00
Michael Zhao
c2862b6947 hypervisor: Move GitV3Its code from arch 
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
 2022-06-06 10:17:26 +08:00