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0fb44c074f
warning: this URL is not a hyperlink --> arch/src/aarch64/layout.rs:114:58 | 114 | ...in https://www.kernel.org/doc/Documentation/arm64/booting.txt. | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: use an automatic link instead: `<https://www.kernel.org/doc/Documentation/arm64/booting.txt.>` | = note: bare URLs are not automatically turned into clickable links = note: `#[warn(rustdoc::bare_urls)]` on by default I also noticed that it looks like this comment was supposed to be applied to FDT_MAX_SIZE, not FDT_START, so I moved it. Signed-off-by: Alyssa Ross <hi@alyssa.is>
141 lines
7.2 KiB
Rust
141 lines
7.2 KiB
Rust
// Copyright 2020 Arm Limited (or its affiliates). All rights reserved.
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// Copyright 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Memory layout of AArch64 guest:
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//
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// Physical +---------------------------------------------------------------+
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// address | |
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// end | |
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// ~ ~ ~ ~
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// | |
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// | Highmem PCI MMIO space |
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// | |
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// RAM end +---------------------------------------------------------------+
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// (dynamic, | |
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// including | |
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// hotplug ~ ~ ~ ~
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// memory) | |
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// | DRAM |
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// | |
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// | |
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// 4GB +---------------------------------------------------------------+
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// | 32-bit devices hole |
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// 4GB-64M +---------------------------------------------------------------+
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// | |
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// | |
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// | DRAM |
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// | |
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// | |
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// 1GB +---------------------------------------------------------------+
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// | |
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// | PCI MMCONFIG space |
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// | |
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// 768 M +---------------------------------------------------------------+
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// | |
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// | |
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// | PCI MMIO space |
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// | |
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// 256 M +---------------------------------------------------------------|
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// | |
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// | Legacy devices space |
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// | |
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// 144 M +---------------------------------------------------------------|
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// | |
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// | Reserved (now GIC is here) |
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// | |
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// 4 M +---------------------------------------------------------------+
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// | UEFI flash |
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// 0GB +---------------------------------------------------------------+
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//
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//
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use vm_memory::GuestAddress;
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/// 0x0 ~ 0x40_0000 (4 MiB) is reserved to UEFI
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/// UEFI binary size is required less than 3 MiB, reserving 4 MiB is enough.
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pub const UEFI_START: GuestAddress = GuestAddress(0);
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pub const UEFI_SIZE: u64 = 0x040_0000;
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/// Below this address will reside the GIC, above this address will reside the MMIO devices.
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const MAPPED_IO_START: GuestAddress = GuestAddress(0x0900_0000);
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/// See kernel file arch/arm64/include/uapi/asm/kvm.h for the GIC related definitions.
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/// 0x08ff_0000 ~ 0x0900_0000 is reserved for GICv3 Distributor
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pub const GIC_V3_DIST_SIZE: u64 = 0x01_0000;
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pub const GIC_V3_DIST_START: GuestAddress = GuestAddress(MAPPED_IO_START.0 - GIC_V3_DIST_SIZE);
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/// Below 0x08ff_0000 is reserved for GICv3 Redistributor.
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/// The size defined here is for each vcpu.
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/// The total size is 'number_of_vcpu * GIC_V3_REDIST_SIZE'
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pub const GIC_V3_REDIST_SIZE: u64 = 0x02_0000;
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/// Below Redistributor area is GICv3 ITS
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pub const GIC_V3_ITS_SIZE: u64 = 0x02_0000;
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/// Space 0x0900_0000 ~ 0x0905_0000 is reserved for legacy devices.
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pub const LEGACY_SERIAL_MAPPED_IO_START: GuestAddress = MAPPED_IO_START;
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pub const LEGACY_RTC_MAPPED_IO_START: GuestAddress = GuestAddress(0x0901_0000);
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pub const LEGACY_GPIO_MAPPED_IO_START: GuestAddress = GuestAddress(0x0902_0000);
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/// Space 0x0905_0000 ~ 0x0906_0000 is reserved for pcie io address
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pub const MEM_PCI_IO_START: GuestAddress = GuestAddress(0x0905_0000);
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pub const MEM_PCI_IO_SIZE: u64 = 0x10000;
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/// Starting from 0x1000_0000 (256MiB) to 0x3000_0000 (768MiB) is used for PCIE MMIO
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pub const MEM_32BIT_DEVICES_START: GuestAddress = GuestAddress(0x1000_0000);
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pub const MEM_32BIT_DEVICES_SIZE: u64 = 0x2000_0000;
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/// PCI MMCONFIG space (start: after the device space at 1 GiB, length: 256MiB)
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pub const PCI_MMCONFIG_START: GuestAddress = GuestAddress(0x3000_0000);
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pub const PCI_MMCONFIG_SIZE: u64 = 256 << 20;
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// One bus with potentially 256 devices (32 slots x 8 functions).
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pub const PCI_MMIO_CONFIG_SIZE_PER_SEGMENT: u64 = 4096 * 256;
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/// Start of RAM.
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pub const RAM_START: GuestAddress = GuestAddress(0x4000_0000);
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/// 32-bit reserved area: 64MiB before 4GiB
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pub const MEM_32BIT_RESERVED_START: GuestAddress = GuestAddress(0xfc00_0000);
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pub const MEM_32BIT_RESERVED_SIZE: u64 = 0x0400_0000;
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/// TPM Address Range
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/// This Address range is specific to CRB Interface
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pub const TPM_START: GuestAddress = GuestAddress(0xfed4_0000);
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pub const TPM_SIZE: u64 = 0x1000;
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/// Start of 64-bit RAM.
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pub const RAM_64BIT_START: GuestAddress = GuestAddress(0x1_0000_0000);
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/// Kernel command line maximum size.
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/// As per `arch/arm64/include/uapi/asm/setup.h`.
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pub const CMDLINE_MAX_SIZE: usize = 2048;
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/// FDT is at the beginning of RAM.
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pub const FDT_START: GuestAddress = RAM_START;
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/// Maximum size of the device tree blob as specified in [the kernel
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/// documentation](https://www.kernel.org/doc/Documentation/arm64/booting.txt).
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pub const FDT_MAX_SIZE: u64 = 0x20_0000;
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/// Put ACPI table above dtb
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pub const ACPI_START: GuestAddress = GuestAddress(RAM_START.0 + FDT_MAX_SIZE);
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pub const ACPI_MAX_SIZE: u64 = 0x20_0000;
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pub const RSDP_POINTER: GuestAddress = ACPI_START;
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/// Kernel start after FDT and ACPI
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pub const KERNEL_START: GuestAddress = GuestAddress(ACPI_START.0 + ACPI_MAX_SIZE);
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/// Pci high memory base
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pub const PCI_HIGH_BASE: GuestAddress = GuestAddress(0x2_0000_0000);
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// As per virt/kvm/arm/vgic/vgic-kvm-device.c we need
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// the number of interrupts our GIC will support to be:
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// * bigger than 32
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// * less than 1023 and
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// * a multiple of 32.
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// We are setting up our interrupt controller to support a maximum of 256 interrupts.
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/// First usable interrupt on aarch64
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pub const IRQ_BASE: u32 = 32;
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/// Number of supported interrupts
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pub const IRQ_NUM: u32 = 256;
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