mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
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d419e30df1
In order to validate emulated memory accesses, we need to be able to get all the segments descriptor attributes. This is done by abstracting the SegmentRegister attributes through a trait that each hypervisor will have to implement. Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
125 lines
3.1 KiB
Rust
125 lines
3.1 KiB
Rust
// Copyright 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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//
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// Portions Copyright 2017 The Chromium OS Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE-BSD-3-Clause file.
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//
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// Copyright © 2019 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0 OR BSD-3-Clause
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//
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// Copyright © 2020, Microsoft Corporation
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//
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pub mod gdt;
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#[allow(non_upper_case_globals)]
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#[allow(non_camel_case_types)]
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#[allow(non_snake_case)]
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#[allow(non_upper_case_globals)]
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#[allow(unused)]
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#[allow(
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clippy::unreadable_literal,
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clippy::redundant_static_lifetimes,
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clippy::trivially_copy_pass_by_ref,
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clippy::useless_transmute,
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clippy::should_implement_trait,
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clippy::transmute_ptr_to_ptr,
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clippy::unreadable_literal,
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clippy::redundant_static_lifetimes
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)]
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pub mod msr_index;
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pub mod emulator;
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// MTRR constants
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pub const MTRR_ENABLE: u64 = 0x800; // IA32_MTRR_DEF_TYPE MSR: E (MTRRs enabled) flag, bit 11
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pub const MTRR_MEM_TYPE_WB: u64 = 0x6;
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// IOAPIC pins
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pub const NUM_IOAPIC_PINS: usize = 24;
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// X86 Exceptions
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#[allow(dead_code)]
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#[derive(Clone, Debug)]
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pub enum Exception {
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DE = 1, // Divide Error
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DB = 2, // Debug Exception
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BP = 3, // Breakpoint
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OF = 4, // Overflow
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BR = 5, // BOUND Range Exceeded
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UD = 6, // Invalid/Undefined Opcode
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NM = 7, // No Math Coprocessor
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DF = 8, // Double Fault
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TS = 10, // Invalid TSS
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NP = 11, // Segment Not Present
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SS = 12, // Stack Segment Fault
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GP = 13, // General Protection
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PF = 14, // Page Fault
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MF = 16, // Math Fault
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AC = 17, // Alignment Check
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MC = 18, // Machine Check
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XM = 19, // SIMD Floating-Point Exception
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VE = 20, // Virtualization Exception
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CP = 21, // Control Protection Exception
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}
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pub mod regs;
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// Abstracted segment register ops.
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// Each x86 hypervisor should implement those.
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pub trait SegmentRegisterOps {
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// Segment type
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fn segment_type(&self) -> u8;
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fn set_segment_type(&mut self, val: u8);
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// Descriptor Privilege Level (DPL)
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fn dpl(&self) -> u8;
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fn set_dpl(&mut self, val: u8);
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// Granularity
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fn granularity(&self) -> u8;
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fn set_granularity(&mut self, val: u8);
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// Memory Presence
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fn present(&self) -> u8;
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fn set_present(&mut self, val: u8);
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// Long mode
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fn long(&self) -> u8;
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fn set_long(&mut self, val: u8);
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// Available for system use (AVL)
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fn avl(&self) -> u8;
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fn set_avl(&mut self, val: u8);
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// Descriptor type (System or code/data)
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fn desc_type(&self) -> u8;
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fn set_desc_type(&mut self, val: u8);
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// D/B
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fn db(&self) -> u8;
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fn set_db(&mut self, val: u8);
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}
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// Code segment
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pub const CODE_SEGMENT_TYPE: u8 = 0x8;
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// Read/Write or Read/Exec segment
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pub const RWRX_SEGMENT_TYPE: u8 = 0x2;
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// Expand down segment
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pub const EXPAND_DOWN_SEGMENT_TYPE: u8 = 0x4;
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pub fn segment_type_code(t: u8) -> bool {
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t & CODE_SEGMENT_TYPE != 0
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}
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pub fn segment_type_ro(t: u8) -> bool {
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t & !RWRX_SEGMENT_TYPE == 0
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}
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pub fn segment_type_expand_down(t: u8) -> bool {
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!segment_type_code(t) && (t & EXPAND_DOWN_SEGMENT_TYPE != 0)
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}
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