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https://github.com/cloud-hypervisor/cloud-hypervisor.git
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06dc708515
The reset system is asynchronous with an I/O event (PIO or MMIO) for ACPI/i8042/CMOS triggering a write to the reset_evt event handler. The VMM thread will pick up this event on the VMM main loop and then trigger a shutdown in the CpuManager. However since there is some delay between the CPU threads being marked to be killed (through the CpuManager::cpus_kill_signalled bool) it is possible for the guest vCPU that triggered the exit to be re-entered when the vCPU KVM_RUN is called after the I/O exit is completed. This is undesirable and in particular the Linux kernel will attempt to jump to real mode after a CMOS based exit - this is unsupported in nested KVM on AMD on Azure and will trigger an error in KVM_RUN. Solve this problem by spinning in the device that has triggered the reset until the vcpus_kill_signalled boolean has been updated indicating that the VMM thread has received the event and called CpuManager::shutdown(). In particular if this bool is set then the vCPU threads will not re-enter the guest. Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
61 lines
2.2 KiB
Rust
61 lines
2.2 KiB
Rust
// Copyright 2017 The Chromium OS Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE-BSD-3-Clause file.
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use std::sync::{
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atomic::{AtomicBool, Ordering},
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Arc, Barrier,
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};
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use std::thread;
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use vm_device::BusDevice;
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use vmm_sys_util::eventfd::EventFd;
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/// A i8042 PS/2 controller that emulates just enough to shutdown the machine.
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pub struct I8042Device {
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reset_evt: EventFd,
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vcpus_kill_signalled: Arc<AtomicBool>,
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}
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impl I8042Device {
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/// Constructs a i8042 device that will signal the given event when the guest requests it.
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pub fn new(reset_evt: EventFd, vcpus_kill_signalled: Arc<AtomicBool>) -> I8042Device {
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I8042Device {
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reset_evt,
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vcpus_kill_signalled,
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}
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}
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}
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// i8042 device is located at I/O port 0x61. We partially implement two 8-bit
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// registers: port 0x61 (I8042_PORT_B_REG, offset 0 from base of 0x61), and
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// port 0x64 (I8042_COMMAND_REG, offset 3 from base of 0x61).
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impl BusDevice for I8042Device {
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fn read(&mut self, _base: u64, offset: u64, data: &mut [u8]) {
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if data.len() == 1 && offset == 3 {
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data[0] = 0x0;
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} else if data.len() == 1 && offset == 0 {
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// Like kvmtool, we return bit 5 set in I8042_PORT_B_REG to
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// avoid hang in pit_calibrate_tsc() in Linux kernel.
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data[0] = 0x20;
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}
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}
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fn write(&mut self, _base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
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if data.len() == 1 && data[0] == 0xfe && offset == 3 {
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info!("i8042 reset signalled");
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if let Err(e) = self.reset_evt.write(1) {
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error!("Error triggering i8042 reset event: {}", e);
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}
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// Spin until we are sure the reset_evt has been handled and that when
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// we return from the KVM_RUN we will exit rather than re-enter the guest.
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while !self.vcpus_kill_signalled.load(Ordering::SeqCst) {
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// This is more effective than thread::yield_now() at
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// avoiding a priority inversion with the VMM thread
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thread::sleep(std::time::Duration::from_millis(1));
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}
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}
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None
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}
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}
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