Jinank Jain af2ce3e0cc hypervisor: Basic implementation of setup_regs for MSHV ARM64 guests ...

As part of this configure the program counter, pstate and X0 registers.
Program counter will point to the start address of the kernel/firmware
in the guest memory. X0 will point to start of the FDT.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

2025-04-23 07:42:29 +00:00

..

src

hypervisor: Basic implementation of setup_regs for MSHV ARM64 guests

2025-04-23 07:42:29 +00:00

Cargo.toml

hypervisor: Add definition for parsing EsrEl2 register

2025-04-17 13:11:23 +00:00