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https://github.com/cloud-hypervisor/cloud-hypervisor.git
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376db31107
In order to restore devices relying on MSI-X, the MsixConfig structure must be restored with the correct values. Additionally, the KVM routes must be restored so that interrupts can be delivered through KVM the way they were configured before the snapshot was taken. Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
47 lines
1.3 KiB
Rust
47 lines
1.3 KiB
Rust
// Copyright 2018 The Chromium OS Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE-BSD-3-Clause file.
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//! Implements pci devices and busses.
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#[macro_use]
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extern crate log;
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extern crate devices;
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extern crate serde;
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#[macro_use]
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extern crate serde_derive;
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extern crate serde_json;
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extern crate vm_memory;
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mod bus;
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mod configuration;
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mod device;
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mod msi;
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mod msix;
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pub use self::bus::{PciBus, PciConfigIo, PciConfigMmio, PciRoot, PciRootError};
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pub use self::configuration::{
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PciBarConfiguration, PciBarPrefetchable, PciBarRegionType, PciCapability, PciCapabilityID,
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PciClassCode, PciConfiguration, PciHeaderType, PciMassStorageSubclass,
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PciNetworkControllerSubclass, PciProgrammingInterface, PciSerialBusSubClass, PciSubclass,
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};
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pub use self::device::{
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BarReprogrammingParams, DeviceRelocation, Error as PciDeviceError, PciDevice,
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};
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pub use self::msi::{msi_num_enabled_vectors, MsiCap, MsiConfig};
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pub use self::msix::{MsixCap, MsixConfig, MsixTableEntry, MSIX_TABLE_ENTRY_SIZE};
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/// PCI has four interrupt pins A->D.
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#[derive(Copy, Clone)]
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pub enum PciInterruptPin {
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IntA,
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IntB,
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IntC,
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IntD,
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}
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impl PciInterruptPin {
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pub fn to_mask(self) -> u32 {
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self as u32
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}
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}
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