Jinank Jain d22e7e2638 hypervisor: Add definition for parsing EsrEl2 register ...

This helps in implementing an instruction decoder for MSVH which does
not support in-kernel instruction decoding like KVM.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

2025-04-17 13:11:23 +00:00

..

arch

hypervisor: Add definition for parsing EsrEl2 register

2025-04-17 13:11:23 +00:00

kvm

hypervisor: Add GICv2M support for MSHV ARM64 guest

2025-04-14 16:33:10 +00:00

mshv

hypervisor: Silence compiler warning for unused variables

2025-04-16 03:36:12 +00:00

cpu.rs

hypervisor, vmm: Avoid leaking hypervisor specific data structure

2025-02-12 23:08:43 +00:00

device.rs

hypervisor, vmm: use new vfio-ioctls

2022-07-21 23:37:53 +01:00

hypervisor.rs

hypervisor: use memory size during VM creation

2024-12-12 03:32:22 +00:00

lib.rs

hypervisor: Enable MSHV compilation on ARM64

2025-04-16 03:36:12 +00:00

vm.rs

hypervisor: Implement hypervisor agnostic variant of VcpuInit

2025-02-12 23:08:43 +00:00