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This commit is part of a series of similar commits. Signed-off-by: Philipp Schuster <philipp.schuster@cyberus-technology.de> On-behalf-of: SAP philipp.schuster@sap.com
174 lines
6.5 KiB
Rust
174 lines
6.5 KiB
Rust
// Copyright 2017 The Chromium OS Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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//
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// SPDX-License-Identifier: Apache-2.0 AND BSD-3-Clause
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use std::cmp::min;
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use std::sync::atomic::{AtomicBool, Ordering};
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use std::sync::{Arc, Barrier};
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use std::{mem, thread};
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// https://github.com/rust-lang/libc/issues/1848
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#[cfg_attr(target_env = "musl", allow(deprecated))]
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use libc::time_t;
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use libc::{CLOCK_REALTIME, clock_gettime, gmtime_r, timespec, tm};
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use log::{info, warn};
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use vm_device::BusDevice;
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use vmm_sys_util::eventfd::EventFd;
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const INDEX_MASK: u8 = 0x7f;
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const INDEX_OFFSET: u64 = 0x0;
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const DATA_OFFSET: u64 = 0x1;
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const DATA_LEN: usize = 128;
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/// A CMOS/RTC device commonly seen on x86 I/O port 0x70/0x71.
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pub struct Cmos {
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index: u8,
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data: [u8; DATA_LEN],
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reset_evt: EventFd,
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vcpus_kill_signalled: Option<Arc<AtomicBool>>,
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}
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impl Cmos {
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/// Constructs a CMOS/RTC device with initial data.
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/// `mem_below_4g` is the size of memory in bytes below the 32-bit gap.
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/// `mem_above_4g` is the size of memory in bytes above the 32-bit gap.
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pub fn new(
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mem_below_4g: u64,
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mem_above_4g: u64,
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reset_evt: EventFd,
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vcpus_kill_signalled: Option<Arc<AtomicBool>>,
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) -> Cmos {
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let mut data = [0u8; DATA_LEN];
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// Extended memory from 16 MB to 4 GB in units of 64 KB
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let ext_mem = min(
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0xFFFF,
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mem_below_4g.saturating_sub(16 * 1024 * 1024) / (64 * 1024),
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);
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data[0x34] = ext_mem as u8;
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data[0x35] = (ext_mem >> 8) as u8;
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// High memory (> 4GB) in units of 64 KB
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let high_mem = min(0x00FF_FFFF, mem_above_4g / (64 * 1024));
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data[0x5b] = high_mem as u8;
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data[0x5c] = (high_mem >> 8) as u8;
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data[0x5d] = (high_mem >> 16) as u8;
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Cmos {
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index: 0,
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data,
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reset_evt,
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vcpus_kill_signalled,
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}
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}
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}
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impl BusDevice for Cmos {
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fn write(&mut self, _base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
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if data.len() != 1 {
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warn!("Invalid write size on CMOS device: {}", data.len());
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return None;
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}
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match offset {
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INDEX_OFFSET => self.index = data[0],
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DATA_OFFSET => {
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if self.index == 0x8f && data[0] == 0 {
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info!("CMOS reset");
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self.reset_evt.write(1).unwrap();
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if let Some(vcpus_kill_signalled) = self.vcpus_kill_signalled.take() {
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// Spin until we are sure the reset_evt has been handled and that when
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// we return from the KVM_RUN we will exit rather than re-enter the guest.
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while !vcpus_kill_signalled.load(Ordering::SeqCst) {
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// This is more effective than thread::yield_now() at
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// avoiding a priority inversion with the VMM thread
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thread::sleep(std::time::Duration::from_millis(1));
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}
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}
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} else {
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self.data[(self.index & INDEX_MASK) as usize] = data[0];
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}
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}
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o => warn!("bad write offset on CMOS device: {o}"),
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}
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None
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}
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fn read(&mut self, _base: u64, offset: u64, data: &mut [u8]) {
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fn to_bcd(v: u8) -> u8 {
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assert!(v < 100);
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((v / 10) << 4) | (v % 10)
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}
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if data.len() != 1 {
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warn!("Invalid read size on CMOS device: {}", data.len());
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return;
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}
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data[0] = match offset {
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INDEX_OFFSET => self.index,
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DATA_OFFSET => {
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let seconds;
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let minutes;
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let hours;
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let week_day;
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let day;
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let month;
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let year;
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// SAFETY: The clock_gettime and gmtime_r calls are safe as long as the structs they are
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// given are large enough, and neither of them fail. It is safe to zero initialize
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// the tm and timespec struct because it contains only plain data.
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let update_in_progress = unsafe {
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let mut timespec: timespec = mem::zeroed();
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clock_gettime(CLOCK_REALTIME, &mut timespec as *mut _);
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// https://github.com/rust-lang/libc/issues/1848
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#[cfg_attr(target_env = "musl", allow(deprecated))]
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let now: time_t = timespec.tv_sec;
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let mut tm: tm = mem::zeroed();
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gmtime_r(&now, &mut tm as *mut _);
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// The following lines of code are safe but depend on tm being in scope.
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seconds = tm.tm_sec;
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minutes = tm.tm_min;
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hours = tm.tm_hour;
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week_day = tm.tm_wday + 1;
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day = tm.tm_mday;
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month = tm.tm_mon + 1;
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year = tm.tm_year;
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// Update in Progress bit held for last 224us of each second
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const NANOSECONDS_PER_SECOND: i64 = 1_000_000_000;
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const UIP_HOLD_LENGTH: i64 = 8 * NANOSECONDS_PER_SECOND / 32768;
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timespec.tv_nsec >= (NANOSECONDS_PER_SECOND - UIP_HOLD_LENGTH)
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};
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match self.index {
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0x00 => to_bcd(seconds as u8),
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0x02 => to_bcd(minutes as u8),
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0x04 => to_bcd(hours as u8),
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0x06 => to_bcd(week_day as u8),
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0x07 => to_bcd(day as u8),
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0x08 => to_bcd(month as u8),
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0x09 => to_bcd((year % 100) as u8),
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// Bit 5 for 32kHz clock. Bit 7 for Update in Progress
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0x0a => (1 << 5) | ((update_in_progress as u8) << 7),
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// Bit 0-6 are reserved and must be 0.
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// Bit 7 must be 1 (CMOS has power)
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0x0d => 1 << 7,
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0x32 => to_bcd(((year + 1900) / 100) as u8),
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_ => {
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// self.index is always guaranteed to be in range via INDEX_MASK.
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self.data[(self.index & INDEX_MASK) as usize]
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}
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}
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}
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o => {
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warn!("bad read offset on CMOS device: {o}");
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0
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}
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}
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}
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}
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