mirror of
https://github.com/microsoft/regorus.git
synced 2026-08-05 02:16:11 +00:00
49bd3c22f3
* feat!: add Rego Virtual Machine (RVM) implementation This commit introduces a register-based virtual machine for executing Rego policies with bytecode-style instructions. Unlike the existing tree-walking interpreter, the RVM compiles policies into instruction sequences that operate on virtual registers, offering better performance and optimization potential. Core Components: Instruction Set Architecture: - Define instruction types for data operations, control flow, and builtins - Implement instruction parameter encoding and display formatting - Add instruction parser with comprehensive test coverage Virtual Machine Engine: - Register-based execution model with program counter management - Loop execution supporting iterators, comprehensions, and quantifiers - Function call handling with argument evaluation and context management - Rule evaluation with default value resolution and virtual data support - Arithmetic and comparison operation implementations Program Representation: - Program listing builder with instruction sequencing - Rule tree construction for organizing policy rules - Binary and JSON serialization for compiled programs - Recompilation support for program modification Testing Infrastructure: - Extensive YAML test suites covering all VM features - Rust unit tests for VM execution and instruction parsing - Test suites for loops, comprehensions, builtins, and control flow BREAKING CHANGE: Introduces new VM execution path alongside interpreter Signed-off-by: Anand Krishnamoorthi <anakrish@microsoft.com> * docs: add detailed RVM architecture references Introduce architecture.md explaining program artifacts, serialization, and runtime subsystems. Document the full opcode catalog in instruction-set.md, including operands, parameter tables, and outcomes. Walk through execution flow, stacks, and operational guidance in vm-runtime.md, tying the runtime to the new architecture docs. Signed-off-by: Anand Krishnamoorthi <anakrish@microsoft.com> --------- Signed-off-by: Anand Krishnamoorthi <anakrish@microsoft.com>
33 lines
1.2 KiB
YAML
33 lines
1.2 KiB
YAML
# Copyright (c) Microsoft Corporation.
|
|
# Licensed under the MIT License.
|
|
|
|
# Basic VM Instructions Test Suite
|
|
# Tests fundamental instructions: Load, Move, Return
|
|
# These form the foundation for all other VM operations
|
|
|
|
cases:
|
|
- note: load_instruction
|
|
description: Test basic Load instruction
|
|
example_rego: "42" # Simple literal expression
|
|
literals:
|
|
- 42
|
|
- "hello"
|
|
- true
|
|
instructions:
|
|
- "Load { dest: 0, literal_idx: 0 }" # Load literal 42 into register 0
|
|
- "Load { dest: 1, literal_idx: 1 }" # Load literal "hello" into register 1
|
|
- "Load { dest: 2, literal_idx: 2 }" # Load literal true into register 2
|
|
- "Return { value: 0 }" # Return value from register 0
|
|
want_result: 42
|
|
|
|
- note: move_instruction
|
|
description: Test Move instruction
|
|
example_rego: "x := 123; x" # Variable assignment and reference
|
|
literals:
|
|
- 123
|
|
instructions:
|
|
- "Load { dest: 0, literal_idx: 0 }" # Load literal 123 into register 0 (x := 123)
|
|
- "Move { dest: 1, src: 0 }" # Move value from register 0 to register 1 (reference x)
|
|
- "Return { value: 1 }" # Return value from register 1
|
|
want_result: 123
|