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devices: ivshmem: handle short BAR0 register reads

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BAR0 can technially be read with 1 or 2 byte MMIO. Don't panic in that
case.

Signed-off-by: Dylan Reid <dgreid@fb.com>
This commit is contained in:
Dylan Reid
2026-06-09 21:00:10 -07:00
committed by Rob Bradford
parent 4b2a77b86e
commit a048fa982d
1 changed files with 2 additions and 3 deletions
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5
devices/src/ivshmem.rs
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@@ -10,7 +10,6 @@ use std::sync::atomic::{AtomicU32, Ordering};
use std::sync::{Arc, Barrier, Mutex}; use std::sync::{Arc, Barrier, Mutex};
use anyhow::anyhow; use anyhow::anyhow;
use byteorder::{ByteOrder, LittleEndian};
use log::{debug, error, warn}; use log::{debug, error, warn};
use pci::{ use pci::{
BarReprogrammingParams, PCI_CONFIGURATION_ID, PciBarConfiguration, PciBarPrefetchable, BarReprogrammingParams, PCI_CONFIGURATION_ID, PciBarConfiguration, PciBarPrefetchable,
@@ -335,8 +334,8 @@ impl PciDevice for IvshmemDevice {
match bar_idx { match bar_idx {
// bar 0 // bar 0
0 => { 0 => {
// ivshmem don't use interrupt, we return zero now. // ivshmem doesn't use an interrupt, we return zero now.
LittleEndian::write_u32(data, 0); data.fill(0);
} }
// bar 2 // bar 2
1 => warn!("Unexpected read ivshmem memory idx: {offset}"), 1 => warn!("Unexpected read ivshmem memory idx: {offset}"),