hypervisor: Set additional partition property for MSHV guest

For ARM64 guests we need to set three important partition property:

1) PPI interrupt ID for timer interrupt
2) PPI interrupt ID for PMU interrupts.
3) Hiding LPI support from the guest because MSHV does emulate ITS for
   the guest.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

hypervisor/src/arch/aarch64/regs.rs

@@ -224,3 +224,5 @@ pub const AARCH64_ARCH_TIMER_HYP_IRQ: u32 = 10;
 
 // PMU PPI interrupt number
 pub const AARCH64_PMU_IRQ: u32 = 7;
+
+pub const AARCH64_MIN_PPI_IRQ: u32 = 16;