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https://github.com/cloud-hypervisor/cloud-hypervisor.git
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devices: introduce ivshmem device
This patch introduces the inter-vm shared memory(ivshmem) device to share a memory region between multiple processes running different guests and the host. This patch supports the basic ivshmem functions like ivshmem-plain in QEMU[1]. [1] https://www.qemu.org/docs/master/specs/ivshmem-spec.html Signed-off-by: Yi Wang <foxywang@tencent.com> Signed-off-by: Songqian Li <sionli@tencent.com>
This commit is contained in:
Songqian Li
@@ -45,5 +45,6 @@ arch = { path = "../arch" }
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[features]
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default = []
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fw_cfg = ["arch/fw_cfg", "bitfield-struct", "linux-loader", "zerocopy"]
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ivshmem = []
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kvm = ["arch/kvm"]
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pvmemcontrol = []
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361
devices/src/ivshmem.rs
Normal file
361
devices/src/ivshmem.rs
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@@ -0,0 +1,361 @@
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// Copyright © 2024 Tencent Corporation. All rights reserved.
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//
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// SPDX-License-Identifier: Apache-2.0
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//
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use std::any::Any;
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use std::path::PathBuf;
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use std::result;
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use std::sync::atomic::{AtomicU32, Ordering};
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use std::sync::{Arc, Barrier, Mutex};
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use anyhow::anyhow;
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use byteorder::{ByteOrder, LittleEndian};
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use pci::{
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BarReprogrammingParams, PciBarConfiguration, PciBarPrefetchable, PciBarRegionType,
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PciClassCode, PciConfiguration, PciDevice, PciDeviceError, PciHeaderType, PciSubclass,
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PCI_CONFIGURATION_ID,
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};
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use serde::{Deserialize, Serialize};
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use thiserror::Error;
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use vm_allocator::{AddressAllocator, SystemAllocator};
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use vm_device::{BusDevice, Resource, UserspaceMapping};
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use vm_memory::bitmap::AtomicBitmap;
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use vm_memory::{Address, GuestAddress};
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use vm_migration::{Migratable, MigratableError, Pausable, Snapshot, Snapshottable, Transportable};
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use vmm_sys_util::eventfd::EventFd;
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const IVSHMEM_BAR0_IDX: usize = 0;
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const IVSHMEM_BAR1_IDX: usize = 1;
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const IVSHMEM_BAR2_IDX: usize = 2;
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const IVSHMEM_VENDOR_ID: u16 = 0x1af4;
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const IVSHMEM_DEVICE_ID: u16 = 0x1110;
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const IVSHMEM_REG_BAR_SIZE: u64 = 0x100;
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type GuestRegionMmap = vm_memory::GuestRegionMmap<AtomicBitmap>;
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#[derive(Debug, Error)]
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pub enum IvshmemError {
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#[error("Failed to retrieve PciConfigurationState: {0}")]
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RetrievePciConfigurationState(#[source] anyhow::Error),
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#[error("Failed to retrieve IvshmemDeviceState: {0}")]
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RetrieveIvshmemDeviceStateState(#[source] anyhow::Error),
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}
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#[derive(Copy, Clone)]
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pub enum IvshmemSubclass {
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Other = 0x00,
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}
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impl PciSubclass for IvshmemSubclass {
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fn get_register_value(&self) -> u8 {
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*self as u8
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}
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}
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pub struct IvshmemDevice {
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id: String,
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// ivshmem device registers
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interrupt_mask: u32,
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interrupt_status: Arc<AtomicU32>,
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iv_position: u32,
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doorbell: u32,
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// PCI configuration registers.
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configuration: PciConfiguration,
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bar_regions: Vec<PciBarConfiguration>,
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region: Option<Arc<GuestRegionMmap>>,
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region_size: u64,
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userspace_mapping: Option<UserspaceMapping>,
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reprogram_evt: EventFd,
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}
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#[derive(Serialize, Deserialize, Default, Clone)]
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pub struct IvshmemDeviceState {
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interrupt_mask: u32,
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interrupt_status: u32,
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iv_position: u32,
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doorbell: u32,
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}
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impl IvshmemDevice {
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pub fn new(
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id: String,
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region_size: u64,
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snapshot: Option<Snapshot>,
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) -> Result<Self, IvshmemError> {
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let pci_configuration_state =
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vm_migration::state_from_id(snapshot.as_ref(), PCI_CONFIGURATION_ID).map_err(|e| {
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IvshmemError::RetrievePciConfigurationState(anyhow!(
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"Failed to get PciConfigurationState from Snapshot: {e}",
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e
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))
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})?;
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let state: Option<IvshmemDeviceState> = snapshot
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.as_ref()
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.map(|s| s.to_state())
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.transpose()
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.map_err(|e| {
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IvshmemError::RetrieveIvshmemDeviceStateState(anyhow!(
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"Failed to get IvshmemDeviceState from Snapshot: {e}",
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))
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})?;
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let configuration = PciConfiguration::new(
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IVSHMEM_VENDOR_ID,
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IVSHMEM_DEVICE_ID,
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0x1,
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PciClassCode::MemoryController,
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&IvshmemSubclass::Other,
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None,
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PciHeaderType::Device,
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0,
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0,
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None,
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pci_configuration_state,
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);
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let device = if let Some(s) = state {
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IvshmemDevice {
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id,
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configuration,
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bar_regions: vec![],
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interrupt_mask: s.interrupt_mask,
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interrupt_status: Arc::new(AtomicU32::new(s.interrupt_status)),
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iv_position: s.iv_position,
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doorbell: s.doorbell,
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region_size,
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region: None,
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userspace_mapping: None,
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}
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} else {
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IvshmemDevice {
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id,
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configuration,
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bar_regions: vec![],
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interrupt_mask: 0,
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interrupt_status: Arc::new(AtomicU32::new(0)),
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iv_position: 0,
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doorbell: 0,
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region_size,
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region: None,
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userspace_mapping: None,
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}
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};
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Ok(device)
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}
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pub fn config_bar_addr(&self) -> u64 {
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self.configuration.get_bar_addr(IVSHMEM_BAR0_IDX)
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}
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pub fn data_bar_addr(&self) -> u64 {
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self.configuration.get_bar_addr(IVSHMEM_BAR2_IDX)
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}
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fn state(&self) -> IvshmemDeviceState {
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IvshmemDeviceState {
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interrupt_mask: self.interrupt_mask,
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interrupt_status: self.interrupt_status.load(Ordering::SeqCst),
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iv_position: self.iv_position,
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doorbell: self.doorbell,
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}
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}
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}
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impl BusDevice for IvshmemDevice {
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fn read(&mut self, base: u64, offset: u64, data: &mut [u8]) {
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self.read_bar(base, offset, data)
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}
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fn write(&mut self, base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
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self.write_bar(base, offset, data)
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}
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}
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impl PciDevice for IvshmemDevice {
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fn allocate_bars(
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&mut self,
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_allocator: &Arc<Mutex<SystemAllocator>>,
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mmio32_allocator: &mut AddressAllocator,
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mmio64_allocator: &mut AddressAllocator,
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resources: Option<Vec<Resource>>,
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) -> std::result::Result<Vec<PciBarConfiguration>, PciDeviceError> {
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let mut bars = Vec::new();
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let mut bar0_addr = None;
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let mut bar2_addr = None;
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let restoring = resources.is_some();
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if let Some(resources) = resources {
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for resource in resources {
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match resource {
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Resource::PciBar { index, base, .. } => {
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match index {
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IVSHMEM_BAR0_IDX => {
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bar0_addr = Some(GuestAddress(base));
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}
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IVSHMEM_BAR1_IDX => {}
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IVSHMEM_BAR2_IDX => {
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bar2_addr = Some(GuestAddress(base));
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}
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_ => {
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error!("Unexpected pci bar index {index}");
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}
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};
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}
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_ => {
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error!("Unexpected resource {resource:?}");
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}
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}
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}
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if bar0_addr.is_none() || bar2_addr.is_none() {
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return Err(PciDeviceError::MissingResource);
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}
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}
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// BAR0 holds device registers (256 Byte MMIO)
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let bar0_addr = mmio32_allocator
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.allocate(bar0_addr, IVSHMEM_REG_BAR_SIZE, None)
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.ok_or(PciDeviceError::IoAllocationFailed(IVSHMEM_REG_BAR_SIZE))?;
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debug!("ivshmem bar0 address 0x{:x}", bar0_addr.0);
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let bar0 = PciBarConfiguration::default()
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.set_index(IVSHMEM_BAR0_IDX)
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.set_address(bar0_addr.raw_value())
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.set_size(IVSHMEM_REG_BAR_SIZE)
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.set_region_type(PciBarRegionType::Memory32BitRegion)
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.set_prefetchable(PciBarPrefetchable::NotPrefetchable);
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// BAR1 holds MSI-X table and PBA (only ivshmem-doorbell).
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// BAR2 maps the shared memory object
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let bar2_size = self.region_size;
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let bar2_addr = mmio64_allocator
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.allocate(bar2_addr, bar2_size, None)
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.ok_or(PciDeviceError::IoAllocationFailed(bar2_size))?;
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debug!("ivshmem bar2 address 0x{:x}", bar2_addr.0);
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let bar2 = PciBarConfiguration::default()
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.set_index(IVSHMEM_BAR2_IDX)
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.set_address(bar2_addr.raw_value())
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.set_size(bar2_size)
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.set_region_type(PciBarRegionType::Memory64BitRegion)
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.set_prefetchable(PciBarPrefetchable::Prefetchable);
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if !restoring {
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self.configuration
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.add_pci_bar(&bar0)
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.map_err(|e| PciDeviceError::IoRegistrationFailed(bar0_addr.raw_value(), e))?;
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self.configuration
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.add_pci_bar(&bar2)
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.map_err(|e| PciDeviceError::IoRegistrationFailed(bar2_addr.raw_value(), e))?;
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}
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bars.push(bar0);
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bars.push(bar2);
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self.bar_regions = bars.clone();
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Ok(bars)
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}
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fn free_bars(
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&mut self,
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_allocator: &mut SystemAllocator,
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_mmio32_allocator: &mut AddressAllocator,
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_mmio64_allocator: &mut AddressAllocator,
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) -> std::result::Result<(), PciDeviceError> {
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unimplemented!("Device hotplug and remove are not supported for ivshmem");
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}
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fn write_config_register(
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&mut self,
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reg_idx: usize,
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offset: u64,
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data: &[u8],
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) -> (Vec<BarReprogrammingParams>, Option<Arc<Barrier>>) {
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(
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self.configuration
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.write_config_register(reg_idx, offset, data),
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None,
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)
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}
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fn read_config_register(&mut self, reg_idx: usize) -> u32 {
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self.configuration.read_reg(reg_idx)
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}
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fn read_bar(&mut self, base: u64, offset: u64, data: &mut [u8]) {
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debug!("read base {base:x} offset {offset}");
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let mut bar_idx = 0;
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for (idx, bar) in self.bar_regions.iter().enumerate() {
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if bar.addr() == base {
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bar_idx = idx;
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}
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}
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match bar_idx {
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// bar 0
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0 => {
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// ivshmem don't use interrupt, we return zero now.
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LittleEndian::write_u32(data, 0);
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}
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// bar 2
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1 => warn!("Unexpected read ivshmem memory idx: {offset}"),
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_ => {
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warn!("Invalid bar_idx: {bar_idx}");
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}
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};
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}
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fn write_bar(&mut self, base: u64, offset: u64, _data: &[u8]) -> Option<Arc<Barrier>> {
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debug!("write base {base:x} offset {offset}");
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warn!("Unexpected write ivshmem memory idx: {offset}");
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None
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}
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fn move_bar(&mut self, old_base: u64, new_base: u64) -> result::Result<(), std::io::Error> {
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for bar in self.bar_regions.iter_mut() {
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if bar.addr() == old_base {
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*bar = bar.set_address(new_base);
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}
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}
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Ok(())
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}
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fn as_any_mut(&mut self) -> &mut dyn Any {
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self
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}
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fn id(&self) -> Option<String> {
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Some(self.id.clone())
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}
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}
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impl Pausable for IvshmemDevice {}
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impl Snapshottable for IvshmemDevice {
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fn id(&self) -> String {
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self.id.clone()
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}
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// The snapshot/restore (also live migration) support only work for ivshmem-plain mode.
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// Additional work is needed for supporting ivshmem-doorbell.
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fn snapshot(&mut self) -> std::result::Result<Snapshot, MigratableError> {
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let mut snapshot = Snapshot::new_from_state(&self.state())?;
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// Snapshot PciConfiguration
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snapshot.add_snapshot(self.configuration.id(), self.configuration.snapshot()?);
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Ok(snapshot)
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}
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}
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impl Transportable for IvshmemDevice {}
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impl Migratable for IvshmemDevice {}
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@@ -24,6 +24,8 @@ pub mod gic;
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pub mod interrupt_controller;
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#[cfg(target_arch = "x86_64")]
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pub mod ioapic;
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#[cfg(feature = "ivshmem")]
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pub mod ivshmem;
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pub mod legacy;
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#[cfg(feature = "pvmemcontrol")]
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pub mod pvmemcontrol;
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@@ -33,6 +35,8 @@ pub mod pvpanic;
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pub mod tpm;
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pub use self::acpi::{AcpiGedDevice, AcpiPmTimerDevice, AcpiShutdownDevice};
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#[cfg(feature = "ivshmem")]
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pub use self::ivshmem::IvshmemDevice;
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pub use self::pvpanic::{PvPanicDevice, PVPANIC_DEVICE_MMIO_SIZE};
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bitflags! {
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