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zipl/boot: reuse STAGE2_ENTRY and PSW_LOAD

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Use STAGE2_ENTRY and PSW_LOAD instead of hard-coded values. While at
it, also move the libc.h to the top in tape2dump.c.

Reviewed-by: Philipp Rudo <prudo@linux.ibm.com>
Reviewed-by: Stefan Haberland <sth@linux.ibm.com>
Signed-off-by: Marc Hartmayer <mhartmay@linux.ibm.com>
Signed-off-by: Jan Höppner <hoeppner@linux.ibm.com>
This commit is contained in:
Marc Hartmayer
2020-03-18 13:07:00 +01:00
committed by Jan Höppner
parent 93a0cb254e
commit 2fe5f27975
5 changed files with 22 additions and 7 deletions
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6
zipl/boot/eckd0_cdl.S
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@@ -13,9 +13,13 @@
# The 1st CCW reads stage 1 IPL record.
# The 2nd CCW tics to the loaded stage 1 IPL record.
#
#include "boot/loaders_layout.h"
#include "boot/s390.h"
.org 0x0
.globl _start
_start:
.long 0x00080000,0x80002018 # PSW :the first 24 byte are loaded by IPL
.quad PSW_LOAD+STAGE2_ENTRY # PSW :the first 24 byte are loaded by IPL
.long 0x06000018,0x60000068 # read IPL record 2
.long 0x08000018,0x00000000 # TIC to stage 1

6
zipl/boot/eckd0_ldl.S
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@@ -14,9 +14,13 @@
# The 2nd CCW reads stage 1 IPL record (re-read record 1) and continues with
# command chaining at address 0x18
#
#include "boot/loaders_layout.h"
#include "boot/s390.h"
.org 0x0
.globl _start
_start:
.long 0x00080000,0x80002018 # PSW :the first 24 byte are loaded by IPL
.quad PSW_LOAD+STAGE2_ENTRY # PSW :the first 24 byte are loaded by IPL
.long 0x16002000,0x60000016 # Read record zero
.long 0x06000000,0x60000080 # Read IPL record 1 again

6
zipl/boot/fba0.S
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@@ -15,10 +15,14 @@
# The 1st CCW reads block 0 again with READ IPL
# The 2nd CCW tics to the re-loaded stage 1 IPL record.
#
#include "boot/loaders_layout.h"
#include "boot/s390.h"
.org 0x0
.globl _start
_start:
.long 0x00080000,0x80002018 # The first 24 byte are loaded
.quad PSW_LOAD+STAGE2_ENTRY # The first 24 byte are loaded
.long 0x02000000,0x60000000+.Lend # by ipl to addresses 0-23.
.long 0x08000000+.Ltic,0x40000000 # Tic to continuation
#

5
zipl/boot/tape0.S
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@@ -9,6 +9,7 @@
#include "boot/sigp.h"
#include "boot/linux_layout.h"
#include "boot/s390.h"
IPL_BS = 1024 # block size for tape access
IPL_OFF = 0x4000 # temporary kernel load addr
@@ -31,7 +32,7 @@ _start:
# Stage 0 loader - loads first block of this loader
.long 0x00080000,0x80000000+iplstart # PSW to start execution
.quad PSW_LOAD+iplstart # PSW to start execution
.long 0x27000000,0x60000001 # backward Space Block
.long 0x02000000,0x20000000+IPL_BS # read IPL_BS bytes to addr 0
@@ -57,7 +58,7 @@ _parm_addr:
_initrd_addr:
.quad RAMDISK_ORIGIN # ramdisk load address
_load_psw:
.quad 0x0008000080000000+KERNEL_ADDR # kernel start PSW
.quad PSW_LOAD+KERNEL_ADDR # kernel start PSW
#
# Subroutine to load from tape until tape mark

6
zipl/boot/tape2dump.c
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@@ -9,11 +9,13 @@
* it under the terms of the MIT license. See LICENSE for details.
*/
#include "libc.h"
#include "lib/zt_common.h"
#include "boot/loaders_layout.h"
#include "boot/s390.h"
#include "cio.h"
#include "error.h"
#include "libc.h"
#include "stage2dump.h"
#define BLK_SIZE 0x8000 /* We write 32 KB at a time */
@@ -36,7 +38,7 @@ struct tape_head {
} __packed;
struct tape_head __section(.stage2.head) tape_head = {
.psw = 0x0008000080002018ULL, /* Start code at 0x2018 */
.psw = PSW_LOAD | STAGE2_ENTRY, /* Start code at 0x2018 */
.ccw1 = 0x0700000060000001ULL, /* Rewind ccw */
.ccw2 = 0x0200200020003000ULL, /* CCW to load dump tool to 0x2000 */
};